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january 2012 doc id 022458 rev 1 1/23 AN4009 application note steval-ifp019v1: design with vni4140k-32 quad high-side smart power solid-state relay ics introduction the steval-ifp019v1 demonstration board has been developed to show the new vni4140k-32 device functionalities within industrial applications such as plcs (programmable logic controllers) which drive lamps, valves, relays, and similar loads. this tool allows the evaluation of the vni4140k-32 features, in particular all kinds of embedded self-protections, powe r-handling capabilities, operat ion and diagnos tic feedback, thermal behavior, and conformity to inherent iec standards. figure 1. steval-ifp019v1 a double-sided pcb allows the obtaining of the best trade-off between a routing solution and thermal management results. the main features of the demonstration board are: four output channels (4 x 1 a) four input channels four feedback channels for diagnostic purposes bi-directional opto-isolated interface for mcu safe connection ttl/cmos compatible signals for mcu direct connection leds to indicate output state compliance to iec61000-4-4, iec61000-4-5, and iec61000-4-2 10.5 v to 36 v dc power supply voltage range. www.st.com
contents AN4009 2/23 doc id 022458 rev 1 contents 1 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 safety precautions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 vni4140k-32 quad high-side smart power solid-state relay ic description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 steval-ifp019v1 demonstration board descr iption . . . . . . . . . . . . . . 8 4.1 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.2 steval-ifp019v1 schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.3 steval-ifp019v1 connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.4 steval-ifp019v1 thermal management . . . . . . . . . . . . . . . . . . . . . . . . 11 4.5 emc immunity test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.5.1 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.5.2 burst immunity test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.5.3 surge test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.5.4 esd test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 appendix a bill of material . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 appendix b pcb layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 appendix c references . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
AN4009 list of figures doc id 022458 rev 1 3/23 list of figures figure 1. steval-ifp019v1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 figure 2. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. steval-ifp019v1 top view. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 4. steval-ifp019v1 bottom view. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 5. steval-ifp019v1 schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 6. j1 connector pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 7. j5 connector pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 8. steval-ifp019v1 pcb copper heatsink . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 9. thermal map in steady-state condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1 figure 10. thermal map in demagnetization condition (1 hz repetitive cycling on 48 w 1.2 h load) . 11 figure 11. steady-state thermal behavior 3d simulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 12. repetitive demagnetization thermal behavior 3d simulation (1 hz repetitive cycling on 48 w 1.2 h load) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 13. burst timing waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 14. eft test set-up according to iec 61000-4-4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 15. surge standard timing waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 16. surge test set-up on supply voltage lines according to iec 61000-4-5 . . . . . . . . . . . . . . . 16 figure 17. esd test set-up according to iec 61000-4-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 18. steval-ifp019v1 compone nt layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 19. steval-ifp019v1 copper top layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 20. steval-ifp019v1 copper bottom layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
electrical characteristics AN4009 4/23 doc id 022458 rev 1 1 electrical characteristics the electrical characteristics of the vni 4140k-32 demonstration board (steval-ifp019v1) are given in ta b l e 1 . table 1. steval-ifp019v1 electrical characteristics parameter value notes min. typ. max. operating conditions ambient operating temperature 85 c if the vni4140k-32 junction temperature exceeds 170 c, the device shuts down power supply vcc supply voltage 10.5 v 24 v 36 v vdd logic supply voltage 5 v supply current on vdd 250 a all channels in off state 2.4 ma 4.8 ma on state with v in = 5 v output stage output channel on current limitation 1 a 2.6 a ic internally limited v cc = 24 v; r load < 10 m maximum dc output current dv/dt (on) turn-on voltage slope 4 v/s i out = 0.5 a, resistive load dv/dt (off) turn-off voltage slope 4 v/s i out = 0.5 a, resistive load demagnetization protection output voltage on inductive turn-off v cc -41 v cc -45 v cc -52 i out = 0.5 a; l load >= 1 mh
AN4009 safety precautions doc id 022458 rev 1 5/23 2 safety precautions the board must be used only by expert technicians. the copper areas around the vni4140k-32 device have a heatsink function, visible in the top layer layout view, refer to figure 8 . in case of short-circuit, current limiting or hard demagnetization, the steval- ifp019v1 board, or part of it, may reach a very high temperature with consequent dangers. no specific protections are implemented for reverse dc accidental connection. remember that an electrolytic capacitor is connected to the supply bus, therefore a reverse continuous dc voltage applied to it may produce a dangerous explosion. warning: st assumes no responsibility for any consequences which may result from the improper use of this tool.
vni4140k-32 quad high-side smart power solid-state relay ic description AN4009 6/23 doc id 022458 rev 1 3 vni4140k-32 quad high-side smart power solid-state relay ic description the vni4140k-32 is a monolithic 4-channel driver featuring a very low supply current. the ic, which uses stmicroelectronics vipower? technology, is intended for driving loads with one side connected to ground. active channel current limitation, combined with thermal shutdown (independent for each channel), and automatic restart, protect the device against overload. the main features of the vni4140k-32 ic are: output current: 1 a per channel shorted load protections for each channel junction overtemperature protection case overtemperature protection for thermal independence of the channels thermal case shutdown and restart not simultaneous in each single channel protection against ground disconnection current limitation undervoltage shutdown open drain diagnostic outputs 3.3 v cmos/ttl compatible inputs fast demagnetization of inductive loads conforms to iec 61131-2. figure 2. block diagram active current limitation avoids that the system power supply drops in case of a shorted load. in overload condition, the channel turns off and back on automatically after the ic temperatures decrease below a threshold fixed by a temperature hysteresis so that junction !-v 5ndervoltage $etection #urren,imiter #lamp0ower *unction4emp $etection ,ogic 3amestructure forallchannels 6ccclamp 6cc '.$ /u tput /u tput /u tput /u tput )nput )nput )nput )nput 3tatus 3tatus 3tatus 3tatus #ase4emp $etection
AN4009 vni4140k-32 quad high-side smart power solid-state relay ic description doc id 022458 rev 1 7/23 temperature is controlled. if this condition c auses the case temperature to reach the case temperature limit (t csd ), overloaded channels (i.e. the ones for which junction temperature has exceeded the junction protection threshold, t jsd , and has not fallen below the junction protection reset threshold, t jr ) are turned off. these channels restart, non-simultaneously, only when the case temperature decreases below the case protection reset threshold (t cr ). non-overloaded channels continue to operate normally. the open drain diagnostic outputs indicate related channel overtemperature conditions.
steval-ifp019v1 demonstration board description AN4009 8/23 doc id 022458 rev 1 4 steval-ifp019v1 demonstration board description 4.1 overview the vni4140k-32 demonstration board is composed of two main sections: opto-isolated interface for input and status signals a four-channel self-protect power stage section with stmicroelectronics tr a n s i l ? diode protection the demonstration board consists of a double-sided fr4 printed circuit board with 35 m copper plating. the pcb dimensions are 52 mm x 68 mm. the top and bottom views are shown below. figure 3. steval-ifp019v1 top view figure 4. steval-ifp019v1 bottom view
AN4009 steval-ifp019v1 demonstration board description doc id 022458 rev 1 9/23 4.2 steval-ifp019v1 schematic figure 5. steval-ifp019v1 schematic !-v # n&,6 # n&,6 # n&,6 # n&,6 # n& # u& 4 4 4 4 '.$ /54 /5 4 /54 /5 4 6dc - -6)4%" - -6)4%" $ 3-4!# # n& # n& /04 0#11 4 4 4 4 * '.$$)3#4%34 4 4 4 4 * 6cc$)3#4%34 #522%.402/"% * /0%. &/2 /6,4%34 $, ,%$ $, ,%$ $, ,%$ $, ,%$ 22 + 22 + ). ). ). ). 22 + 22 + 6$$ 34!4 34!4 34!4 34!4 ). ). ). ). 6$$ 34!4 34!4 34!4 34!4 ). ). ). ). 6$$ 34!4 34!4 34!4 34!4 /04 0#11 /2 * %6!,#/--"/!2$ 6cc 4! " /54?b /54?a /54?b /54?c /54?a ). 34!4 ). ). ). 34!4 34!4 34!4 /54?c /54?a /54?b /54?c /54?a /54?b /54?c '.$ 6. )+ 6cc )# * #!. 22 + ! " ! " ! "
steval-ifp019v1 demonstration board description AN4009 10/23 doc id 022458 rev 1 4.3 steval-ifp019v1 connectors the demonstration board is equipped with input and output connectors. specifically, there are two input header connectors (j5 and j1), one 4-channel output connector (m1), and a supply voltage connector (m2). both input connectors, j5 and j1, provide the same bi-directional signals guaranteeing the maximum compatibility with existing stmicroele ctronics tools such as the industrial communication board (see an2451) and similar products. figure 6. j1 connector pinout figure 7. j5 connector pinout table 2. j1 and j5 pin description j1 pin number j5 pin number signal type 11 1 vdd 5/3.3 v supply voltage 23 2 gnd signal ground 9 3 in1 input channel 1 13 4 in2 input channel 2 15 5 in3 input channel 3 17 6 in4 input channel 4 6 7 stat1 status channel 1 25 8 stat2 status channel 2 21 9 stat3 status channel 3 19 10 stat4 status channel 4 !-v !-v
AN4009 steval-ifp019v1 demonstration board description doc id 022458 rev 1 11/23 4.4 steval-ifp019v1 thermal management the steval-ifp019v1 pcb has two heatsinks: approximately 1 sq. cm on the top layer and 3 sq. cm on the bottom layer, thermally interconnected through 9 vias, as shown in figure 8 . in a steady-state condition, low r ds(on) ensures a very low dissipation but in current limitation and in fast demagnetization, the power dissipation is much higher, requiring a low thermal resistance through the device exposed tab, soldering space, top layer, vias and bottom layer path. a 35 m copper (10 oz/sq. ft) thickness and 0.3 mm diameter for the vias are used according to eia/jesd51-5. figure 8. steval-ifp019v1 pcb copper heatsink figure 9 and 11 show the steval-ifp019v1 temperature map with all channels permanently switched on with 48 loads, 24 v supply voltage and ambient temperature of 25 c. the ic temperature increase is only about a few degrees. figure 10 and 12 show a similar map when the ic is cycling at 1 hz, 50% duty cycle, 48 1.2 h loads, 24 v supply voltage and ambient temperature of 25 c. figure 9. thermal map in steady-state condition figure 10. thermal map in demagnetization condition (1 hz re petitive cycling on 48 1.2 h load) am01 8 51v1 am01 8 52v1
steval-ifp019v1 demonstration board description AN4009 12/23 doc id 022458 rev 1 in particular, figure 11 and 12 show 3d thermal modeling of the device. 4.5 emc immunity test 4.5.1 description the steval-ifp019v1 has been tested according iec61000-4-4, iec61000-4-5 and iec61000-4-2. (burst, surge and electrostatic discharge). the evaluation criteria (shown below) reported in the standards has been used to verify the acceptance of the results. normal performance temporary degradation or loss of function or performance, with automatic return to normal operation temporary degradation or loss of function with of external intervention to recover normal operation degradation or loss of function, need substitution of damaged components to recover normal operation. 4.5.2 burst immunity test the signal according the iec61000-4-4: pulse duration: 5 ns +/- 30% pulse duration: 50 ns +/- 30% polarity: positive/negative burst duration (td): 15 ms+/- 20% at 5 khz burst period (tr): 300 ms+/- 20% duration time t: 1 minute applied to: supply voltage lines, output line through capacitive clamp and directly through embedded coupling capacitor in the generator. figure 13 below shows the standard timing waveform applied during the burst test. figure 11. steady-state thermal behavior 3d simulation figure 12. repetitive demagnetization thermal behavior 3d simulation (1 hz repetitive cycling on 48 1.2 h load) am01 8 5 3 v1 am01 8 54v1
AN4009 steval-ifp019v1 demonstration board description doc id 022458 rev 1 13/23 figure 13. burst timing waveform ta bl e 3 shows the results of an inherent burst test. normal performance has been observed when applying four different disturbance levels on the output ports and vcc main voltage power supply. note: 1 outputs floating. 2 to reach same results reported in the tables above, it is necessary to replace c7 and c8 with two high voltage capacitors. note: outputs loaded by 1 k resistors. table 3. application eft (burst) robustness, applied to supply voltage lines configuration eft test signal amplitude, te st result @ polarity (+/-) 1 kv 2 kv 3 kv 4 kv 5 kv standard a / a a / a a / a b / b b / b primary and secondary gnds shorted a / a a / a b / a b / b b / b table 4. application eft (burst) robustness, applied to output lines configuration eft test signal amplitude, te st result @ polarity (+/-) 1 kv 2 kv 3 kv 4 kv 5 kv standard a / a a / a b / b b / b b / b
steval-ifp019v1 demonstration board description AN4009 14/23 doc id 022458 rev 1 figure 14. eft test set-up according to iec 61000-4-4 4.5.3 surge test a high energy surge test was performed in differential mode. a high surge signal was injected on the dut (device under test) through a 42 ? decoupling resistor. the test consisted of three positive and three negative discharges with a repetition rate of 1 discharge per minute. figure 15 shows the standard timing waveform applied on the dut. !-v ()7*hqhudwru p 0hwdosodqh !p !p pwklfnlvrodwlrq &d s dflwlyh&rx s olq j &odp s 6xsso\9rowdjh /lqhv9'& pwklfnlvrodwlrq [9/hdg edwwhu\fhoov 67(9$/,)39 !p (duwkfrqqhfwlrq
AN4009 steval-ifp019v1 demonstration board description doc id 022458 rev 1 15/23 figure 15. surge standard timing waveform test signal according the iec 61000-4-5: ? 5 positive and 5 negative surges ? repetition rate: 1 minute ? coupling: 42 /0.5 f applied to: ? supply lines (vcc, gnd) ? differential mode (dm), vcc vs. gnd ? common mode (cm), vcc vs. earth ? output lines (out1) ? differential mode (dm), vcc vs. gnd ? common mode (cm), vcc vs. earth note: to reach same results reported in the tables above, it is necessary to replace c7 and c8 with two high voltage capacitors. table 5. application test results, surge applied to supply lines configuration mode surge test signal am plitude, test result @ polarity (+/-) 1 kv 1.5 kv 2 kv 2.5 kv 3 kv standard evalboard differential b / a - b / b - b / b common a / b - b / a - b / b table 6. application test results, surge applied to supply lines configuration mode surge test signal am plitude, test result @ polarity (+/-) 1 kv 1.5 kv 2 kv 2.5 kv 3 kv standard evalboard differential b / b - b / b - b / b common b / b - b / b - b / b
steval-ifp019v1 demonstration board description AN4009 16/23 doc id 022458 rev 1 figure 16. surge test set-up on supply voltage lines according to iec 61000-4-5 4.5.4 esd test the test signal according the iec 61000-4-2: ? contact discharge/ air discharge ? polarity: positive/negative ? discharge unit: 150 pf/330 ? applied to: board output terminal figure 17. esd test set-up according to iec 61000-4-2 am11024v1 surge generator 1m metal plane 0.1m thick isolation supply voltage lines steval-ifp019v1 ref plane connection 42 /0.5 f coupling 2 internal impedance battery cells 24v ref plane connection am110 3 1v1 s teval-ifp019v1 ev a l b o a rd e s d 3 0 gener a tor 8 0cm met a l pl a ne (horizont a l co u pling pl a ne) 470k k 470k 2.2k k power su pply gnd pl a ne i s ol a tion su pport s ( 3 cm) e s d g u n bleeder wire s 470k k 2.2k k 470k k k k k ? (b a ttery cell s )
AN4009 steval-ifp019v1 demonstration board description doc id 022458 rev 1 17/23 table 7. application esd robustness discharge mode esd test signal amplitude, test result @ polarity (+ / -) 5 kv 10 kv 15 kv 20 kv 25 kv contact b / b b / b b / b b / b b / b air b / b b / b b / b b / b b / b
bill of material AN4009 18/23 doc id 022458 rev 1 appendix a bill of material table 8. steval-ifp019v1 demonstration board bill of material designator part type description rr1 10 k x 4 smd resistor pack 1206 format rr2 10 k x 4 smd resistor pack 1206 format rr3 1 k x 4 smd resistor pack 1206 format rr4 10 k x 4 smd resistor pack 1206 format rr5 47 k x 4 smd resistor pack 1206 format c1 10 nf lv smd capacitor 1206 format c2 10 nf lv smd capacitor 1206 format c3 10 nf lv smd capacitor 1206 format c4 10 nf lv smd capacitor 1206 format c5 100 nf smd capacitor 1206 format c6 47 f 50 v smd electrolytic capacitor c7 4.7 nf smd capacitor 1206 format c8 4.7 nf smd capacitor 1206 format d1 sm15t39ac transil? diode dl1 led diode smd led diode 0805 format dl2 led diode smd led diode 0805 format dl3 led diode smd led diode 0805 format dl4 led diode smd led diode 0805 format opt1 pc3q66q 4-channel opto-isolator opt2 pc3q66q 4-channel opto-isolator ic1 vni4140k-32 st ic industrial 4 ch hsd j1 header 34-pin compatible evalcommboard j2 jumper overvoltage test j3 jumper ground disconnection test j4 jumper v cc disconnection test j5 header 14-pin compatible st7canic db m1 4 screw plugs hsd output connector m2 2 screw plugs power supply connector t1 test point hsd output channel 1 voltage t2 test point hsd output channel 2 voltage t3 test point hsd output channel 3 voltage t4 test point hsd output channel 4 voltage
AN4009 bill of material doc id 022458 rev 1 19/23 t5 test point hsd input channel 1 signal t6 test point hsd input channel 2 signal t7 test point hsd input channel 3 signal t8 test point hsd input channel 4 signal t9 test point hsd channel 1 status t10 test point hsd channel 2 status t11 test point hsd channel 3 status t12 test point hsd channel 4 status table 8. steval-ifp019v1 demonstration board bill of material (continued) designator part type description
pcb layout AN4009 20/23 doc id 022458 rev 1 appendix b pcb layout figure 18. steval-ifp019v1 component layer figure 19. steval-ifp019v1 copper top layer figure 20. steval-ifp019v1 copper bottom layer
AN4009 references doc id 022458 rev 1 21/23 appendix c references 1. an1351 application note
revision history AN4009 22/23 doc id 022458 rev 1 revision history table 9. document revision history date revision changes 10-jan-2012 1 initial release
AN4009 doc id 022458 rev 1 23/23 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by two authorized st representatives, st products are not recommended, authorized or warranted for use in milita ry, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2012 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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